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The King Abdullah II School for Electrical Engineering Electronics Engineering Department Digital Electronics Lab. (EE21339) Prepared By: Eng. Hazem W. Marar Al-Uzaizat 2013 Digital Electronics Lab. (EE 21339) Table of Contents: ã Experiments to be covered: Exp. No. Experiment Title 1. The Transistor Switch 2. The Discrete and IC TTL Logic Characteristics 3. The CMOS G
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    The King Abdullah II School for Electrical Engineering   Electronics Engineering Department   Digital Electronics Lab.   (EE21339)   Prepared By:   Eng. Hazem W. Marar Al-Uzaizat   2013    Digital Electronics Lab. (EE 21339)   Table of Contents:   ã Experiments to be covered:   Exp. No.   Experiment Title   1.  The Transistor Switch 2.  The Discrete and IC TTL Logic Characteristics 3.  The CMOS Gates Logic Characteristics 4.   The 555 Timer    5.  Triggering Circuits 6.  A/D and D/A Converters 7.  Introduction to VERILOG 8.  Sequential Login in VERILOG    Experiment (1):   The Transistor Switch   1.1 Reference  Microelectronic Circuits by Sidra & Smith, chapter 14. 1.2 Objectives  To study the characteristics of BJT as a switch and as a basic logic inverter. Circuits for RTL logic gates are considered. 1.3 Discussion  A bipolar junction transistor (BJT) may be made to act like a simple ON/OFF switch. In such an application, the transistor is operated in the saturation region to simulate the ON (Closed) switch condition and in the cutoff region to simulate the OFF (Open) switch condition. The input applied to the base of the transistor either turns it ON (Saturates) or OFF (Cutoff) as shown in figure 1.1. When the transistor switch is ON, V CE  -V CE  (Sat); and when the transistor is OFF, V CE  = V CC . One common use of a transistor switch is the inverter circuit. Notice that for a logic 0 input the transistor will be OFF and the output will be equal to V CC ;  a logic 1 . On the other hand a logic 1 at the input saturates the transistor and results in an output voltage V CE  (Sat) of approximately 0.2 -0.3 Volts; a logic 0 . Figure 1.2 shows a two-input NOR gate of the RTL family. It can be easily shown that if one of the inputs is high (logic 1 ) then the corresponding switch will be ON and the output is low (logic 0 ). On the other hand, a high at the output needs both switches to  be OFF. Clearly, this is obtained if both inputs are simultaneously low. Figure 1.1   Figure 1.2 1.4 Procedure  1.   Connect the transistor switch as shown in figure 1.1. 2.   Apply 0 V (ground) at the input Vi. Measure and record the voltage at the output Vo. 3.   Apply DC 5 V at the input Vi. Measure and record the voltage at the output Vo. 4.   Apply a 5-Vpp 1 kHz sine wave at the input and use the oscilloscope to observe and record the input as well as the output voltage waveforms. 5.   Increase the input frequency slowly and observe its effect on the output waveform. 6.   Use the oscilloscope (in the X-Y mode) to plot the transfer characteristics of the inverter in figure 1.1. Arrange that Vo is displayed vertically and Vi is displayed horizontally on the screen. Use a triangular wave input of 5V p-p at 1 kHz applied to the input. 7.   Connect the RTL gate as shown in figure 1.2 and carry out an experiment to verify the truth table of the RTL gate. 8.   Connect the circuit shown in figure 1.3, and carry out the steps from 1 to 6. 1.5 Questions   1. Find the noise margin 0 and 1 from the transfer characteristics of the RTL inverter shown in figure 1.1. 2. Find the noise margin 0 and 1 from the transfer characteristics of the TTL inverter shown in figure 5.3.

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Jul 23, 2017

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